In a semiconductor integrated circuit (IC) such as an LSI or VLSI, a power supply circuit (DC-DC converter) is provided to convert an input voltage to a specific direct-current voltage using a step-up circuit to step-up the input voltage or a step-down circuit to step-down the input voltage. There is always some, albeit a small amount of, parasitic capacitance present in transistors configuring an IC. In particular, in transistors having what is referred to as a triple-well structure with an N well (deep N well) provided between a substrate and a P well, parasitic capacitance occurs both between the substrate and the N well and between the N well and the P well.
There is accordingly a proposal for a step-up circuit that employs, in addition to an nMOS transistor employed for charge transport and a node-pumping capacitor, an nMOS transistor for voltage transmission. Such a step-up circuit is formed with an nMOS transistor for P well charge transport and an nMOS transistor for voltage transmission, with the source of the charge transport nMOS transistor connected to the P well through the voltage transmission nMOS transistor. The source voltage of the charge transport nMOS transistor that rises during step-up is accordingly transmitted to the P well, suppressing a back bias effect caused by parasitic capacitance.
There is also a proposal for a step-up circuit employing two N-channel transistors provided between parallel disposed step-up cells, and provided with a low voltage output analogue comparator circuit that outputs the lower voltage out of a first row of step-up cells output voltage and a second row of step-up cells output voltage. In such a step-up circuit, the output terminal of the low voltage output analogue comparator circuit is connected to a transistor of the low voltage output analogue comparator circuit and to each of the N wells of the first row of step-up cells and the second row of step-up cells. The step-up circuit thereby fixes the electrical potential of the N wells of each of the step-up cells to an output electrical potential and reduces the charge-discharge charge amount caused by parasitic capacitance between the N well and the substrate.
Moreover, there is a proposal for a step-up circuit having a charge-pump circuit employing plural capacitors and diodes, wherein a MOS transistor is employed that is formed by a P well on an N well, and the N well of the capacitor is connected to the output terminal. In such a charge-pump circuit, by connecting the N well of the capacitor to the output terminal, a voltage is supplied to the N well of the power supply voltage or above, and so parasitic capacitance between the N well and the P well is made small.
However, in a step-down circuit and a step-up circuit equipped with a high side driver and a transistor employed for switching, a bootstrap capacitor is connected between the power supply side of the high side driver and the source of the switching transistor. An IC provided with such a step-down circuit or step-up circuit is formed either employing a bootstrap capacitor inside the chip or employing a bootstrap capacitor connected to the chip.
However, in a power supply circuit formed with such a step-down circuit or step-up circuit, a drop occurs in the electrostatic capacitance employed for bootstrapping due to the parasitic capacitance arising in the transistors acting as floating capacitance attached to the gates. Thus in such a power supply circuit, the power supply voltage of the high side driver that drives a switching transistor is suppressed. Hence, in a power supply circuit employing a bootstrap capacitor, the electrostatic capacitance of the bootstrap capacitor needs to be made larger in advance to take into consideration the drop caused by parasitic capacitance of the transistor.